As artificial intelligence transitions from experimental deployments to mission-critical production infrastructure, organizations face a fundamental shift from model-centric optimization to system-centric engineering. While advances in model architectures and accelerator technologies have driven recent AI breakthroughs, long-term performance, reliability, and sustainability increasingly depend on the interaction between compute, memory, networking, software runtimes, operations, and governance. This talk presents an industry roadmap for building scalable AI systems that move beyond isolated model optimization toward adaptive, software-defined AI platforms. The roadmap explores five interconnected layers—compute, memory and data, interconnect, runtime and operating systems, and operations and governance—and demonstrates how these layers collectively influence throughput, latency, cost, energy efficiency, reliability, and compliance. The discussion introduces workload-aware architectures for inference, retrieval-augmented generation (RAG), agentic workflows, multimodal applications, and edge AI, highlighting the growing importance of memory hierarchies, topology-aware scheduling, adaptive control loops, and cluster-scale orchestration. A practical AI systems maturity model is proposed to help organizations assess current capabilities and prioritize investments, progressing from ad hoc experimentation to autonomous, policy-governed AI fabrics. The presentation concludes with a pragmatic execution framework and industry best practices for achieving predictable service levels, operational resilience, and sustainable AI economics. The central thesis is that future AI leadership will be determined not by model performance alone, but by the ability to design, operate, and govern AI as an integrated systems platform

Co-Sponsored by the Photonics Chapter

    As silicon photonics and co-packaged optics (CPO) technologies continue to scale for AI, cloud, and high-bandwidth networking applications, reliability qualification methodologies are becoming increasingly critical.  While much of the industry focus has been on performance and integration density, standardized approaches for qualification, reliability assessment and long-term service life prediction remain an important industry challenge.   
    This webinar will present the motivation, structure, and key technical considerations behind the emerging JEDEC work that Cisco has led on Silicon Photonics Qualification and Reliability Requirements.  The session will discuss reliability expectations and qualification strategies for silicon photonics devices, chiplets, integrated optical assemblies, and heterogeneous integration approaches used in AI and datacenter applications.  The webinar is intended for engineers and technologists working in silicon photonics, advanced packaging, NPO, CPO, datacenter infrastructure, reliability engineering, semiconductor manufacturing, and optical module development.

PART I: The Road to Gate-All-Around CMOS (07/17 -- 12:10PM )
Despite the much debated end of Moore's Law, CMOS scaling still maintains economic relevance with 2nm gate-all-around SoCs anticipated in the coming quarters. Area scaling extensively driven by design/technology innovations co-optimized for primarily logic scaling continue to offer compelling node-to-node power, performance, area, and cost benefits. In this tutorial, we will start with a walk through memory lane, recounting a brief history of transistor evolution to motivate the migration from the planar MOSFET to the fully depleted FinFET. We will summarize the key process technology elements that have enabled the finFET CMOS nodes, highlighting the resulting technology characteristics and challenges. This will set the stage for transitioning to the nanoribbon gate-all-around (GAA) transistor architecture and unveiling the magic of how these devices are fabricated.

Part II: The Road to Gate-All-Around and Its Impact on Analog Design (07/17 -- 2:30PM )
Embrace the technology – the essence of how analog design has adapted and thrived throughout decades of increasingly unfriendly CMOS scaling.  This presentation will cover the impact of advanced CMOS on analog design, and examples of the creativity of analog designers to preserve and extend the performance of traditional analog functions. We will finally take a look at technologies on the horizon and suggest how they will impact the future of analog design based on  the challenges that CMOS scaling has imposed. To address the growing effort required for analog/mixed-signal design, we will cover design strategies on how analog design has adapted and thrived through decades of increasingly unfriendly scaling, including the migration to heterogeneous integration.

As artificial intelligence rapidly scales, the infrastructure supporting it faces unprecedented demands. Join us for the CASPA x IEEE 2026 Summer Symposium as we explore the critical power and energy breakthroughs underpinning the future of AI.

This event brings together top pioneers from industry giants—including Supermicro, Intel, Google, Wolfspeed, and Analog Devices. Together, we will dissect how the rapid expansion of AI is reshaping the global power landscape, highlighting recent innovations, resolving complex architectural challenges, and uncovering future opportunities at the intersection of power and intelligence.

Limited Seating available, so please register as soon as possible!!

• Date: Saturday, July 18, 2026

• Time: 1:00 PM – 5:00 PM

• Location: Intel SC-12 Auditorium | 3600 Juliette Ln, Santa Clara, CA 95054

Monday, July 20, 2026

5:30pm – 7:30 pm

 IEEE Consultants' Network: JULY 2026 Meeting ("Home Base")

 From Hidden IP Value to Courtroom Proof:
A Silicon-to-System Framework for IP Evaluation

 Shahram Shafie, MS ECE

Engineering Expert Network: Antenna, ASIC, Algorithm | 4G/5G/6G, Radar, Wi‑Fi, SATCOM | Patent Litigation SME Sourcing & Expert Witness Support | For IP Law Firms, Startups & Venture Capital Firms

TOPIC

Many deep-technology programs encounter technical ambiguity not because the underlying innovation lacks merit, but because system-level interpretation, integration realities, and architecture assumptions are not fully understood until late-stage scrutiny occurs. 

This presentation explores how engineering value can become hidden, misinterpreted, or vulnerable when evaluated only within narrow product contexts rather than through broader system-level analysis. Using antenna systems and distributed RF behavior as representative examples, the discussion examines how technical primitives, architecture mapping, physical behavior, and real-world deployment constraints influence technical defensibility and interpretation. 

The discussion draws on observed patterns from real engineering and litigation contexts to illustrate how system-level interpretation influences technical outcomes in practice. 

The session presents a structured silicon-to-system perspective on evaluating complex engineering systems, with particular emphasis on antenna, ASIC, algorithm, wireless, radar, and SATCOM-related technologies.

LOCATION:
Leucadia Pizza UTC / La Jolla
7748 Regents Rd
San Diego, CA

Menu: https://leucadiapizza.com/menus/utc

COST: 
Free, but you are responsible for your own food/drinks/gratuity
          Order at the counter

PARKING:
Ample parking in front of restaurant

Are you on our LinkedIn group?

Meetup Link for this meeting:  https://www.meetup.com/san-diego-ieee-meetup/events/315014144/ 

This talk provides an overview of some prominent laminate material characterization techniques that are crucial for evaluating laminate permittivity and losses. These techniques are compared and contrasted with newer in-situ methodologies that excel at extracting parameters that yield highly accurate measurement-simulation correlation, highlighting where they excel and where they fall short.

The talk also demonstrates some common phenomena that can lead to dispersion in the measured time delay and effective dielectric constant, namely anomalous dispersion from discontinuities and non-TEM dispersion in microstrip structures.

Humans have managed to pollute the land, the seas, and the atmosphere of our precious planet. We now realize the dangers of such pollution and are working hard to reverse, to the extent possible, the processes that create such pollution. Another kind of pollution is beginning to endanger our well-being as a species. The problem is often referred to as “space junk.” In the seven decades since the advent of space flight in 1957, we have launched a large number of satellites, some of which are still functional and provide valuable services in communications, monitoring, observation, navigation, and surveillance. The number of such satellites has been growing steadily and is slated for even greater growth with our insatiable need for additional communication bandwidth and proposals for exotic projects such as energy harvesting and space-based data centers. Alongside the functioning satellites, we also have dead satellites and a host of space trash: Discarded rocket parts, ballistic missile pieces, debris created by explosions or collision between space objects, dropped tools, coolant droplets, and thermal paint flakes. Until now, we have managed to deal with such space junk, given the fairly low density of objects and the vastness of space. We are now at a critical stage when detection followed by evasive maneuvers to dodge space junk is becoming less feasible. NASA estimates that by early 2025, there were more than 25,000 fairly large objects in Earth's orbit. The number of space junk items may increase exponentially due to collisions between existing items. It is high time that we give serious thought to dealing with trash in space, as we do on Earth.

Please join us for the IEEE Alaska July Section meeting. This month’s program features a presentation on the STAK Energy Project Aaka, a multi-gigawatt, off-grid natural gas fired power plant on Alaska's North Slope by Ginger Kane, Project Director.

We will meet in person on the UAA campus.  Park in the UAA Engineering & Industry Building south parking lot, come in the west building entrance, and head up to room 413.

UAA parking is free on Fridays.

Zoom will be available for those unable to join us on campus. 

A complimentary light lunch will be provided, so advance registration is required. IEEE membership is NOT required to register.

The advent of artificial intelligence, high-performance computing, data centers, health, automotive and communication is driving the quest for more creative integration methods. Future packaging technologies will exhibit high interconnect densities and large numbers of diverse components and devices. Such schemes are expected to offer relaxed transactions between components, increased bandwidth, and better energy efficiency. To achieve these potentials, the implementation of these systems will require assistance from design tools  that can handle unmatched levels of complexity and highly complex computational challenges. This talk will address recent developments in computer-aided design (CAD) tools for interconnects and packages. We will emphasize the signal integrity, power and bandwidth requirements. Multi-domain and multi-physics challenges will be explored as well as potential co-design solutions.

Join IEEE Hawaiʻi Women in Engineering (WIE) for a relaxing and creative Girls' Night Out! Take a break from work and school to unwind with fellow IEEE members while enjoying a Studio Ghibli puzzle activity and DIY keychain making.

This event is a wonderful opportunity to build friendships, network with other women in STEM, and enjoy a fun, welcoming evening together.

✨ Come relax, create, and connect with the IEEE WIE community. We look forward to seeing you!

• 🧩 Complete a Studio Ghibli puzzle together
• 🔑 Design and create your own personalized keychain
• 💬 Enjoy conversations and connect with fellow women in engineering and STEM

IEEE members, students, and friends interested in supporting the IEEE WIE community are welcome.

Please attend the 2026 IEEE Oregon Section Summer Social at Next Level Pinball Shop & Museum

Sign up to volunteer today! Google Form Link (https://forms.gle/KSkkUYPK2QVNQrKS7)

Where: Glad Tidings Family Life Complex

When: 7/27, 2pm to 7:00pm.

Who: For volunteering, college students and professionals are welcome to join!

STEM education is more than just learning about technology or engineering—it’s about developing critical thinking, creativity, and problem-solving skills that are essential in today’s world. By exposing your child to STEM:

• Help them discover new interests and talents.
• Prepare them for high-paying and rewarding careers.
• Show them that they can be creators, innovators, and leaders.

Schedule:

2:15 - 2:30 PM | Welcome & Kickoff

• Welcome
• Event Overview
• Review of safety rules
• Introduction of volunteers, experiment leads, and technology demonstrators

2:30 PM | Presentation #1

Three classes (Build New Car/ attach Robot Arm, Troubleshoot Car/ Review/ Coding, and Art class)

2:45 PM- 5 PM | Build Car and Logo Art Design

5:00 PM– 5:40 PM | Dinner  

6:00 PM– 6:45 PM | Finish Car Building, and Test obstacle course/ race track

6:45 – 7:00 PM | Closing, Photos & Thank You

Our Program’s Commitment

Through our partnership with the IEEE Oakland-East Bay Section, TryEngineering, and Glad Tidings, we are dedicated to fostering a supportive and inclusive environment. Here’s why this program is unique:

Mentors Who Care: STEM professionals from your community will guide your child every step of the way.

• Hands-On Learning: Engaging activities like designing bridges, building robots, and creating LED circuits make learning exciting.

Equity in Education: Our goal is to provide access and opportunity to all children, particularly those in underrepresented communities. 

We understand the vital role parents play in their child’s success. During the event, you’ll:

• See firsthand how STEM activities boost confidence and teamwork.
• Learn about free and affordable resources to continue your child’s STEM journey.
• Meet other parents who share the same goal of empowering their children.

This is a chance to show your child that their dreams matter and that they belong in STEM fields. Secure your spot today!

Register by March 23th
To ensure we have the proper supplies and resources, please RSVP by end of day March. 23, so we can better plan the workshop.

Together, let’s inspire a generation of problem solvers, innovators, and dreamers. We look forward to seeing you there!

Warm regards,
Aaron Lin, IEEE
Benita McLarin, Glad Tidings

Artificial Intelligence is rapidly transforming how organizations generate revenue, streamline operations, and automate complex business processes. From intelligent sales prospecting and personalized customer engagement to autonomous AI agents capable of reasoning, planning, and executing multi-step workflows, AI is becoming an essential driver of business efficiency and competitive advantage.

Following our June session on AI-Powered Productivity, the IEEE Orange County Computer Society GET-AI Series continues with a practical, demo-driven July session focused on how organizations can leverage AI to improve efficiency, reduce operational costs, accelerate business processes, and build intelligent enterprise applications.

This double-feature session combines business and technical perspectives to demonstrate how AI can optimize both customer-facing and enterprise workflows through intelligent automation, advanced prompting techniques, and production-ready AI agent architectures.

As organizations increasingly adopt AI across their operations, the challenge is no longer simply using AI it is applying it strategically to create measurable business value.

This session explores how AI can help organizations:

• Improve operational efficiency through intelligent automation
• Reduce manual effort and operational costs
• Increase sales pipeline quality using AI-driven insights
• Automate repetitive business workflows
• Build enterprise-grade autonomous AI agents to Save Cost

Whether you're a business leader, consultant, architect, developer, product manager, or AI enthusiast, this session provides practical strategies and demonstrations that can be immediately applied within your organization.

Through live demonstrations, this session explores how LangGraph enables developers to build production-ready AI systems that are reliable, scalable, and designed to create efficient enterprise workflows. Attendees will learn how to move beyond simple LLM applications to intelligent agent architectures that streamline operations, optimize resource utilization, and reduce the cost of developing and operating AI-powered solutions.

• LangGraph fundamentals
• Designing efficient AI workflows
• Enterprise AI agent architecture
• Memory and state management
• Tool orchestration and workflow automation
• Human-in-the-loop approvals
• Multi-agent collaboration
• Enterprise automation and cost optimization patterns
• Best practices for building scalable, production-ready AI systems

👉 Takeaway: Learn how to build efficient, enterprise-grade AI systems that automate complex workflows, optimize business operations, reduce development and operational costs, and deliver measurable business value through intelligent automation.

This session demonstrates how AI can fundamentally transform go-to-market execution by identifying real-time business opportunities through trigger events, market signals, sentiment analysis, and intelligent prospecting.

Through live demonstrations, attendees will learn how AI can generate highly personalized outreach, automate prospect research, and enable sales teams to focus on meaningful customer engagement instead of manual list building.

• AI-driven sales intelligence
• Intelligent prospect discovery
• Event-driven customer engagement
• Effective prompting for business workflows
• Hyper-personalized outreach
• Reducing customer acquisition costs
• Improving pipeline quality through AI

👉 Takeaway: Learn how AI can improve sales efficiency, reduce manual effort, and create higher-quality business opportunities through intelligent automation.

Pradyumna Kodgi
Principal Product Manager | Oracle Health & AI
IEEE Senior Member | Vice Chair, IEEE EMBS – Orange County
Member, IEEE AI Agentic Systems & AI Policy Committees

📍 California, USA
📧 pkodgi@ieee.org
🔗 linkedin.com/in/pkodgi

In this talk, we will explore the evolving automation landscape in automotive manufacturing as physical AI and humanoids emerge, unlocking new opportunities. We will analyze how specialized and end-2-end AI models are expanding the capabilities and operational envelope for robots in perception, grasping, manipulation and assembly tasks.  The talk concludes with an industrial view and discussion around strategic factors influencing adoption of physical AI in serial production.

Dr. Parag Patre is an engineering leader with expertise in advanced robotics, physical AI, control systems, and autonomous technologies. Currently serving as a Senior Manager for Advanced Robotics at Magna International, with past tenures at Siemens, TE Connectivity and NASA — he specializes in bridging the gap between academic research and large-scale industrial applications. He holds a PhD in Mechanical Engineering from the University of Florida, a B.Tech. from IIT Madras, and is a widely published expert dedicated to industrializing advanced robotics.

Meeting Announcement: San Diego IEEE Life Members Affinity Group – Tuesday, July 28, 6 pm

Join us for our upcoming gathering!

We are pleased to announce the next meeting of the San Diego IEEE Life Members Affinity Group. All members are warmly invited to join us for an evening of camaraderie, conversation, and connection.  This will be an in person meeting.

·       Date: Tuesday, June 23, 2026

·       Time: 6:00 PM – 8:00 PM

·       Location: Crust Pizzeria

·       124 Solana Hills Dr.

·       Solana Beach, CA 92075

·       Phone: 858.356.9925

Speaker: Dr. Stan Rifkin

Topic for Discussion: The Future of Electronics at the Subatomic Particle (Quantum) Level. (This was the topic that was supposed to be presented at our February meeting earlier this year.)

 "Our Life Member roles in helping young people understand the future of electricity and electronics - at the subatomic level."  We Life Members have exhibited considerable interest in helping students at all levels understand electricity, electronics, and our professions. I am wondering if we are preparing them for a different understanding of electricity than we learned, one that has gained currency (pun optional).

We encourage all San Diego IEEE Life Members to attend and to bring along any colleagues or friends who may be interested. This is a great opportunity to network, share ideas, and enjoy delicious food in a friendly setting.

If you have any questions or require further information, please contact the venue or reach out to Bill Torre, 619-417-9410. We look forward to seeing you there!

Virtual meeting access will also be provided, below is a Webex link:

Agenda

1. Introductions
2. Logistics  - Order Food
3. The Future of Electronics at the Subatomic Particle (Quantum) Level.
4. Summary of Meeting with San Diego STEAM Generation (San Diego HS STEM)
5. Next Meeting

Webex Meeting Information:

A Webex meeting link for this meeting will be sent out separately soon.  Thanks.

The IEEE Oakland-East Bay Communications Society Chapter is pleased to host an IEEE Communications Society Distinguished Lecturer presentation by Dr. Wei Gao, Principal Engineer at Broadcom.

Presentation Title

Meta-Learning-Assisted Predistortion for Power Amplifier Linearization in Wireless Communication Systems

Abstract

Modern wireless communication systems require highly efficient RF power amplifiers while maintaining excellent signal linearity. This presentation introduces recent advances in AI-assisted digital predistortion techniques, focusing on meta-learning-based approaches that improve power amplifier linearization for IEEE 802.11 Wi-Fi systems. The talk discusses practical implementation challenges, optimization techniques, and industrial applications developed through years of experience at Broadcom.

Speaker

Dr. Wei Gao
IEEE Communications Society Distinguished Lecturer (2025–2026)
Principal Engineer, Broadcom

Everyone is welcome, including IEEE members, students, researchers, and industry professionals.

One of the requirements for elevation for Membership in IEEE is to have a minimum of 2 senior members to write recommendation letters in support of the the enrollee/ candidate. As many do not know many Senior Members, the Orange County IEEE Section will be conducting an Elevation Day with Senior members present to provide the needed support.

https://www.ieee.org/membership/senior

Announcing…

IEEE Senior Member Grade
Elevation Night

Sponsored by the IEEE Orange County Section

Date:   31 July 2026

Time:  6 p.m. to 8 p.m.
Where:  Mimi's Cafe, 4030 Barranca Pkwy, Irvine, CA 92604

Who:  All IEEE Members who qualify for Senior Membership

You are invited to an important event – an opportunity to apply for IEEE Senior Member grade!

All IEEE members who meet the qualifications below are encouraged to attend and meet with Senior Members, Fellows, and Honorary Members. Bring your application, obtain Senior Member references and learn more about what Senior membership means. Refreshments are complimentary.

Do you qualify as a Senior Member?

1)      Candidates shall be an engineer, scientist, educator, technical executive, or originator in IEEE-designated fields (Bylaw 1-104.11)

2)      Candidates shall have been in professional practice for at least ten years (see full qualifications)

3)      Candidates shall have shown “significant performance” over a period of at least five of those years in professional practice.

For all information and the application form
https://www.ieee.org/membership/senior

Please bring to the event four copies of both your completed application form and your detailed resume or CV, complete with full details and a strict timeline of dates.

IEEE Senior Members, or above, are invited as reviewers and endorsers. Event has limited seating. This event is exclusive to IEEE members applying for IEEE Senior Membership or serving as reviewers and endorsers, other individuals are kindly asked to refrain from attending this special event. If your availability or willingness to attend changes, please contact the organizing team to cancel your registration to allow for others to attend.

Questions?

Contact Dr Ahmed Saber - ahmed.saber@etap.com

IEEE Senior Members Make a Difference!

August Executive Committee Meeting

     As AI, high-performance computing, and heterogeneous integration continue to scale, advanced packaging is facing growing interconnect challenges across redistribution layers, IC substrates, HDI boards, silicon vias, and emerging glass-core platforms. Higher bandwidth and larger package form factors require finer wiring, smaller vias, higher fan-out density, and more reliable vertical interconnects. In this context, copper seed formation and via metallization are becoming increasingly important bottlenecks for next-generation package and substrate scaling.
     Conventional copper deposition technologies, including physical vapor deposition, electroless plating, and electroplating, each play essential roles in today’s manufacturing flows. However, as via structures become smaller, deeper, rougher, or higher in aspect ratio, limitations such as step coverage, liquid circulation, process uniformity, and seed-layer continuity become more difficult to manage. These challenges are especially relevant across multiple interconnect layers, including motherboard HDI PCBs, IC substrates, RDL, memory and interposer silicon vias, and Si BEOL metal, etc.
     This presentation will introduce Nano Copper Deposition as a solution family for AI-era interconnect scaling. The talk will cover DeepVia™ HDI for high-aspect-ratio via metallization in motherboard HDI PCBs, DS-SAP™ for resolving the trade-off between thin surface seed layers and robust via coverage in IC substrates, and other applications such as Dual Seed Damascene for fine and high-aspect-ratio damascene structures in BEOL and RDL applications, and DeepVia™ Silicon for memory and interposer silicon vias. The discussion will highlight how these approaches can support higher I/O density, improved escape routing, reduced layer-count dependency, and broader process flexibility for next-generation advanced packaging.

The IEEE Electronics Packaging Society (EPS) San Diego Chapter, in partnership with San Diego State University (SDSU), is pleased to present a three-day summer school focused on the fundamentals and emerging trends in electronic packaging design and characterization.

The program is designed for senior undergraduate students, graduate students, recent graduates, and practicing engineers interested in advanced packaging technologies, heterogeneous integration, signal integrity, power integrity, thermal management, materials, package characterization, and electronic design automation.

August ExCom

Three-dimensional NAND flash memory has become a cornerstone of modern data storage, powering everything from mobile devices to hyperscale data centers fueling the AI revolution. As the industry pushes toward both higher storage density through aggressive 
vertical scaling and faster operation to meet the demands of next-generation highperformance SSDs, low-latency AI/ML workloads, and real-time data-intensive applications, the challenges of maintaining robust device reliability grow increasingly complex. This talk provides an industry perspective on the co-evolution of 3D NAND density and performance, covering advances in cell architecture and scaling strategies alongside the reliability challenges that arise when optimizing for both capacity and speed. The presentation will also share practical insights on working as an engineer in the semiconductor memory industry and the career path from academia to industry, aimed at students and young professionals entering the field